29-05-2024, 01:06 PM
![[Image: 0cbe3c9ad80de248d1147c48fd4f32b3.jpg]](https://i123.fastpic.org/big/2024/0528/b3/0cbe3c9ad80de248d1147c48fd4f32b3.jpg)
Computer, Enhance! Programming courses, interviews, commentary
Casey Muratori | Duration: 69 h | Video: H264 1920x1080 | Audio: AAC 48 kHz 2ch | 117 GB | Language: English
This series is designed for programmers who know how to write programs, but don t know how hardware runs those programs. It s designed to bring you up to speed on how modern CPUs work, how to estimate the expected speed of performance-critical code, and the basic optimization techniques every programmer should know.
Contents
1. Welcome to the Performance-Aware Programming Series!
2. Waste
3. Instructions Per Clock
4. Monday Q&A (2023-02-05)
5. Single Instruction, Multiple Data
6. Caching
7. Monday Q&A #2 (2023-02-12)
8. Multithreading
9. Python Revisited
10. Monday Q&A #3 (2023-02-20)
11. The Haversine Distance Problem
12. Instruction Decoding on the 8086
13. Decoding Multiple Instructions and Suffixes
14. Monday Q&A #4 (2023-03-06)
15. Opcode Patterns in 8086 Arithmetic
16. Monday Q&A #5 (2023-03-13)
17. 8086 Decoder Code Review
18. Monday Q&A #6 (2023-03-20)
19. Using the Reference Decoder as a Shared Library
20. Simulating Non-memory MOVs
21. Simulating ADD, SUB, and CMP
22. Simulating Conditional Jumps
23. Monday Q&A #7 (2023-04-10)
24. Simulating Memory
25. Simulating Real Programs
26. Monday Q&A #8 (2023-04-17)
27. Other Common Instructions
28. The Stack
29. Monday Q&A #9 (2023-04-24)
30. Estimating Cycles
31. Monday Q&A #10 (2023-05-08)
32. From 8086 to x64
33. Monday Q&A #11 (2023-05-15)
34. 8086 Simulation Code Review
35. Monday Q&A #12 (2023-05-22)
36. Generating Haversine Input JSON
37. Monday Q&A #13 (2023-05-29)
38. Writing a Simple Haversine Distance Processor
39. Monday Q&A #14 (2023-06-05)
40. Initial Haversine Processor Code Review
41. Monday Q&A #15 (2023-06-12)
42. Introduction to RDTSC
43. Monday Q&A #16 (2023-06-19)
44. Monday Q&A #17 (2023-06-26)
45. Instrumentation-Based Profiling
46. Monday Q&A #18 (2023-07-03)
47. Profiling Nested Blocks
48. Monday Q&A #19 (2023-07-10)
49. Profiling Recursive Blocks
50. Monday Q&A #20 (2023-07-17)
51. A First Look at Profiling Overhead
52. Comparing the Overhead of RDTSC and QueryPerformanceCounter
53. Monday Q&A #21 (2023-07-31)
54. Q&A #22 (2023-08-15)
55. Measuring Data Throughput
56. Q&A #23 (2023-08-21)
57. Repetition Testing
58. Q&A #24 (2023-08-28)
59. Monitoring OS Performance Counters
60. Q&A #25 (2023-09-04)
61. Page Faults
62. Q&A #26 (2023-09-11)
63. Probing OS Page Fault Behavior
64. Q&A #27 (2023-09-18)
65. Four-Level Paging
66. Q&A #28 (2023-09-25)
67. Analyzing Page Fault Anomalies
68. Q&A #29 (2023-10-02)
69. Q&A #30 (2023-10-09)
70. Faster Reads with Large Page Allocations
71. Q&A #31 (2023-10-23)
72. Memory-Mapped Files
73. Q&A #32 (2023-10-30)
74. Inspecting Loop Assembly
75. Q&A #33 (2023-11-06)
76. Q&A #34 (2023-11-13)
77. Analyzing Dependency Chains
78. Q&A #35 (2023-11-20)
79. Linking Directly to ASM for Experimentation
80. Q&A #36 (2023-11-27)
81. CPU Front End Basics
82. Q&A #37 (2023-12-04)
83. Branch Prediction
84. Q&A #38 (2023-12-11)
85. Code Alignment
86. Q&A #39 (2024-01-09)
87. Q&A #40 (2024-01-18)
88. The RAT and the Register File
89. Q&A #41 (2024-01-23)
90. Q&A #42 (2024-01-29)
91. Execution Ports and the Scheduler
92. Q&A #43 (2024-02-06)
93. Increasing Read Bandwidth with SIMD Instructions
94. Q&A #44 (2024-02-26)
95. Cache Size and Bandwidth Testing
96. Q&A #45 (2024-03-04)
97. Non-Power-of-Two Cache Size Testing
98. Q&A #46 (2024-03-11)
99. Latency and Throughput, Again
100. Q&A #47 (2024-03-18)
101. Unaligned Load Penalties
102. Q&A #48 (2024-03-25)
103. Q&A #49 (2024-04-02)
104. Q&A #50 (2024-04-08)
105. Cache Sets and Indexing
106. Q&A #51 (2024-04-18)
107. Q&A #52 (2024-04-29)
108. Non-temporal Stores
109. Q&A #53 (2024-05-06)
110. Prefetching
111. Q&A #54 (2024-05-13)
Homepage
Code:
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